Voltage Controlled Oscillators using On-chip inductors have to be
designed and simulated, with particular attention to achieving Low
Phase noise and parasitic effects( design using On-chip inductors is
important and both designed practial and theoritical have to be
compared) |
Request for Question Clarification by
sgtcory-ga
on
24 Jun 2003 06:16 PDT
Hello nani369,
Are you looking for design studies and analysis for using on-chip
inductors? We can point you to references, theoretical and practical
implementations. Is this the type of data you are seeking?
Thanks for the clarification -
SgtCory
|
Clarification of Question by
nani369-ga
on
24 Jun 2003 12:18 PDT
Ihave to design Low noise VCO's for phase locked loops and transcivers
using on-chip inductors.i have to design VCO's using MATLAB or PSPICE
or HYPERSIGNAL.
basically i dont know what type of laboratory is required to test
this design.
|
Clarification of Question by
nani369-ga
on
25 Jun 2003 00:44 PDT
I have to make a pratical implemenation(ie;Design) of low noise VCO's
(using on-chip intuctors)in any of the lab which i mentioned in my
reviours "clarification of Question" which i really d'not have any
idea.After designing i have to simulate it (where i get practical
value). I have to theoritical evaluate it compare both the pratical
and theoritical implemenations.
|
Request for Question Clarification by
sgtcory-ga
on
25 Jun 2003 08:00 PDT
Hello again,
Would this be the type of information you are looking for :
Bloomfield Labs (Low noise PLL included)
"...engineering firm specializing in the design and development of
Video, Audio, and RF products..."
http://www.bloomfieldlabs.com/
I am still unsure if you desire labs to conduct all steps, from design
to implementation, or prefer to have a physical location to which you
could go and use.
Thanks again for the clarification,
SgtCory
|
Clarification of Question by
nani369-ga
on
26 Jun 2003 00:23 PDT
Hello SgtCory
what i need is i need to design Low noise VCO for PLL which reduces
phase noise.i have to include low noise VCO in PLL.i need not design
PLL but i need only the design ,its simulated performance.yes i have
to peform all the steps from design to implementation as this my main
PROJECT of my masters program.
|
