I need a Verilog behavioral code for:
(1) signed 16 bit multiplication. The product is 16-bits and the
multiplier and multiplicand are each 8 bits. Using Booths algorithm.
the module definition is as follows. I will provide further
clarification about what 'A' and 'Q' and 'Q_1' and 'count' If needed.

module multiplier(prod, busy, mc, mp, clk, start);
output [15:0] prod;
output busy;
input [7:0] mc, mp;
input clk, start;
reg [7:0] A, Q;
reg Q_1;
reg [3:0] count;

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Request for Question Clarification by studboy-ga on 02 May 2005 21:29 PDT

Hi otts786-ga

Is it possible to post the full spec?
For example, I assume busy = not done/in the middle of calculation, right?
What about start?

Thanks

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Clarification of Question by motts786-ga on 04 May 2005 15:44 PDT

start: positivee pulse, it starts a new multiply operation and has a
five-time-unit duration;
positive edge of it coincides with negative edge of clock

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Clarification of Question by motts786-ga on 04 May 2005 15:46 PDT

clarification on 'A' Q and Q_1:

the multiplier and multiplicand are placed in the Q and
M registers, respectively. There is also a 1-bit register placed
logically to the right of the
least significant bit (Q0) of the Q register and designated Q-1; its
use is explained shortly.
The results of the multiplication will appear in the A and Q
registers. A and Q-1 are
initialized to 0. As before, control logic scans the bits of the
multiplier one at a time.
Now, as each bit is examined, the bit to its right is also examined.
If the two bits are the
same (1-1 or 0-0), then all of the bits of the A, Q, and Q-1 registers
are shifted to the right
1 bit. If the two bits differ, then the multiplicand is added to or
subtracted from the A
register, depending on whether the two bits are 0-1 or 1-0. Following
the addition or
subtraction, the right shift occurs. In either case, the right shift
is such that the leftmost bit
of A, namely An-1, not only is shifted into An-2, but also remains in
An-1. This is required
to preserve the sign of the number in A and Q. It is known as an
arithmetic shift, because
it preserves the sign bit.