Digital Design - Designing a D-Latch using only Inverters and Tri-state buffers.
Category: Computers > Algorithms
Asked by: sibljon-ga
List Price: $15.00
20 Oct 2005 11:47 PDT
Expires: 22 Oct 2005 06:27 PDT
Question ID: 582702
I would like to design a D-Latch for use in a circuit, but I only have inverters and tri-state buffers to use. I would like to have two outputs on the D-Latch (one Q and one Q-bar (inverted)). Please provide a diagram showing how the inverters and tri-state buffers are connected to make a D-Latch. Thanks!
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Re: Digital Design - Designing a D-Latch using only Inverters and Tri-state buff
From: jeffp485-ga on 21 Oct 2005 16:27 PDT
You can build a dlatch out of four NAND gates. See this website if you are not sure.. http://www.play-hookey.com/digital/d_nand_latch.html A tri-state buffer with a pull down resistor, functions like an AND gate. you could that that and run it through your inverter to make a NAND gate. Then use four sets of those for the four required gates in your d-latch. Howerver, you can simplify the logic. If have a pull up resistor, you have a NAND with 1 input inverted. The inverted input is the one going into the buffer, and the enable line for the tri-sate is the non-inverting input. - The top left NAND can simply be an AND (tri-state buffer with pull down) - the bottom left can be a NAND with inverted input (tri-state buffer with pull up), run output of top left AND into inverting input - top right can be a NAND with inverted input(tri-state buffer with pull up), run output of top left AND into inverting input. - bottom right then needs to be an AND (tri-state buffer with pull down) and add an inverter to the output to make a NAND. So you only need four tri-state buffers and one inverter.
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