I am operating a transimpedance amplifier for a photodiode
deliberately well past the cutoff frequency of about 40 Hz because I
want to keep the thermal noise down.  A generic picture of the
frequency response is given on Figure 2b on page 2 in:
http://www.ece.utexas.edu/~slyan/archive/ee382m_spring04/notes/lecture16.pdf

I use a second stage of amplification (essentially a differentiator)
to compensate for the gain roll-off and the circuit does quite a good
job of flattening the gain curve up to about 200 kHz.  It also does a
somwhat decent job of compensating for the 90° phase shift introduced in the
first stage, but not out to nearly as high a frequency.  I calibrate
the circuits as carefully as I can to measure and digitally subtract
the actual phase shift because it turns out that any uncalibrated
phase shift is quite detrimental.  I would like to design a smaller
total phase shift directly into the analog circuit.

I know how to design a circuit to compensate for the gain roll off --
matching the break points etc., but I'm not familiar with designing an analog
circuit for optimizing the nulling of the phase shift.  I've read a couple of
papers on phase compensation, such as found in:
http://amsc.tamu.edu/SIS/Publications/pub/jounal/2003_6.pdf
but I don't think that's what I'm looking for.  Can you provide a
tutorial for useful methods for optimizing the compensation for the
phase shift, even at the expense of an optimal compensation for the
gain rolloff?

you may want to look up "Bode's Gain-Phase relation/integral"

for a minimum pahse system the frequency response and phase response
are codeterminant - only 1 may chosen freely, the other is then
completely determined

Filter theory gives the limiting cases of magnitude flatness with the
Buterworth filter family, maximally flat phase responss from Bessel
filters

I find the concept of deliberately rolling off the response @ 40 Hz
and then differentiating to recover a flat 200 KHz bandwidth unlikely
to be optimum for signal to noise ratio

You are trading amplification of the transimpedance input op amp?s
Vnoise for the Vnoise of the differentiating stage-ADC interface and
claiming you can achieve a 5000:1 ratio of these Vnoise contributions?

I would guess that good cmos input transimpedance amp candidates would
have < ~ 20 nV/rtHz Vnoise and the best low Vnoise amp-buffer from the
differentiator to the ADC input couldn?t easily be much below 1
nV/rtHz ? the ratio of these Vnoise sources should set the optimum
ratio of roll off/differentiation (=attenuation/amplification) to much
less than 5000

If you can digitally compensate your phase shift, particularly if
batch post processing is possible, phase compensation with a variety
of DSP techniques: iir, fir digital filters, fast
convolution/filtering with fft on modern PC or dedicated hardware is
certainly easiest ? just design the analog path for maximum S/N,
frequency flatness and low sensitivity/variability to environmental
influences