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Q: 4 bit adder schematics ( Answered 5 out of 5 stars,   0 Comments )
Question  
Subject: 4 bit adder schematics
Category: Science > Technology
Asked by: stwu-ga
List Price: $2.00
Posted: 06 Oct 2002 15:19 PDT
Expires: 05 Nov 2002 14:19 PST
Question ID: 73343
how to design a 4 bit adder schematics ???

Request for Question Clarification by haversian-ga on 06 Oct 2002 16:59 PDT
What level of detail do you need?

A 4-bit adder made of 1-bit adders or half-adders?
A 4-bit adder made of logic gates (any preference for a design based
on minterms or maxterms?)
A 4-bit adder made of transistors?

Do you need this in any particular format?  Do you want VHDL?  Do you
want a hand-drawn schematic?  Do you want something in Design
Architect?

Clarification of Question by stwu-ga on 06 Oct 2002 19:32 PDT
1.is it possible to do both? if not, please use 1-bit
2.CMOS logic gate (no preference on minterms or maxterms)
3.yes, made of transistors
4.no particular format
5.no VHDL
6.please provide a hand-drawn schematic
7.no
Thank you very much

Request for Question Clarification by haversian-ga on 06 Oct 2002 23:30 PDT
Do you want separate circuits, or would the following be acceptable:

1  4-bit adder made of full adders
2  full adder made of half adders
3  half adder made of NAND gates
4  NAND gate made of transistors

This would be most understandable, I think, and would let you create
the circuit at whatever level of complexity you require.

What should I do with the file (a picture, if you'd like a hand-drawn
schematic) once I have it?  Google doesn't want either of us to be
identifiable - I can open a Geocities webpage and post it, if that
would be acceptable.

Clarification of Question by stwu-ga on 07 Oct 2002 06:31 PDT
this is great, i think one circuit is fine.
for the schematic, can it be a pspice file?
but picture is fine too.
I don't know any other better way to send the file, i guess Geocities is fine.
again, thank you so much ^^

Request for Question Clarification by haversian-ga on 07 Oct 2002 10:39 PDT
I've got a student edition of Xilinx Foundation but don't really know
how to use it.  I'm familiar with Design Architect but no longer have
access to the machines it will run on.  I don't think I can do
anything with SPICE.  I can certainly rustle up a drawing tablet and
the Gimp and draw out a circuit that way though.  They really aren't
very complicated if you hide everything within smaller functional
blocks.

You said "this is great, i think one circuit is fine. " - which one
circuit would you like?

Clarification of Question by stwu-ga on 07 Oct 2002 11:41 PDT
1  4-bit adder made of full adders
please forget about the pspice, hand drawing is fine
Answer  
Subject: Re: 4 bit adder schematics
Answered By: haversian-ga on 10 Oct 2002 15:25 PDT
Rated:5 out of 5 stars
 
It's taking me a while to get a drawing tablet and I thought you might
want this sooner than later, so I'm going to try to describe it to
you.  If it's still unclear, just post a clarification request (I'll
get an email about it) and I'll get you a drawing.

Ok, a 1-bit adder has two inputs (two bits), and a carry-in.  It has a
1-bit output and a carry-out.  Here's a table describing its behavior:

Inputs a and b, carry-in called ci.  Output c and carry-out called co.

     a     b    ci          c     co
     0     1     0          1     0
     0     1     1          0     1
     0     0     0          0     0
     0     0     1          1     0
     1     1     0          0     1
     1     1     1          1     1
     1     0     0          1     0
     1     0     1          0     1

To make a 4-bit adder, we need 4 1-bit adders.  We're adding two
numbers, A and B (each 4 bits long, labelled A1, A2, A3..., where 1 is
the right-most (least significant) bit.) and producing a third, C.

We use 4 adders, labelled from right to left adder0 through adder4.

Adder0 takes A1 and B1 as input.  Its carry-in is tied to ground
(logic 0).  It outputs C1 and a carry-out, which is tied to adder1's
carry-in.  Adder1 takes A2 and B2 as inputs, outputs C2, and its
carry-out is tied to adder2's carry-in.  Adder2 takes A3 and B3 as
inputs, outputs C3, and its carry-out is tied to adder3's carry-in. 
Adder3 takes A4 and B4 as inputs, outputs C4, and its carry-out has
some options.  Adder3's carry-out can either become the 5th bit
position of the output C (4 bits is enough to represent the decimal
15.  15 + 15 = 30, which takes 5 bits), or it can be an indicator of
overflow, depending on your application.

     A4 B4   A3 B3   A2 B2   A 1B1
      |  |    |  |    |  |    |  |
     -----   -----   -----   ----- 
     | A |   | A |   | A |   | A |
  /--| D |---| D |---| D |---| D |---ci (tied to 0)
  |  | D |   | D |   | D |   | D |
  |  | 3 |   | 2 |   | 1 |   | 0 |
  |  -----   -----  ------   -----
  |    |       |       |       |
 C5   C4      C3      C2      C1

Does that make sense?

Request for Answer Clarification by stwu-ga on 13 Oct 2002 14:06 PDT
Thanks a lot, I just have a quick question about the answer.

You said: "Adder0 takes A1 and B1 as input.  Its carry-in is tied to
ground
(logic 0)."

What is carry-in? and why is it tied to ground? does this mean
something,like reset?

Thank you!!!

Clarification of Answer by haversian-ga on 13 Oct 2002 19:40 PDT
The adder adds two bits, A and B, to produce one bit, C.  It really
takes 3 inputs though, including a carry-in, which is just a third
number to add together, and produces a 2-bit output, C and carry-out. 
This works better for a few reasons

1)  If it took A and B and produced C, A could be 1 and B could be 1
and then you're stuck, because you can't represent 2 with 1 bit of
binary.  A+B+ci = 2*co + C works better because even if A and B and Ci
are all 1, the answer is 3 which is conveniently represented as 11 in
binary, fully utilizing the 2 bits of output.

2)  It lets you chain adders together this way to make multi-bit
adders very easily.  However, the least-significant bit has no
carry-in because there's no "carry the 2" just like in gradeschool
addition where you learned "carry the 10 (or 20, whatever)".

If you're adding 1100 and 0111, you add 0 + 1 + 0 (carry-in) to get 1,
with a carry of 0.  Next, you add 0 + 1 + 0 (no carry) = 1 with no
carry.  Then, you add 1 + 1 + 0 (no carry) = 0 with a carry of 1.  For
the leftmost bit, you've got 1 + 0 + 1 (carry) = 0, with a carry of 1.
 Thus, you end up with a 5-bit answer: 10011.  That fifth bit can
indicate overflow (0 = all went well; 1 = overflow) or it can just be
another bit of the answer, no different from the four before it.

Did that make sense?  I'm not sure I'm doing a good job explaining it
because the answer is "it's tied to 0 because it works that way - you
never need it to be anything else".  Try thinking about it in decimal
if that helps - all the logic is the same, and all the resons are too.
 If it's still not clear I'll try to come up with another way to
explain it for you.
stwu-ga rated this answer:5 out of 5 stars
very clear answer, nice researcher ^^

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